The invention relates to a memory cell comprising a semiconductor pillar, the memory cell having a first high-impedance state and a second low-impedance state, corresponding to unprogrammed and programmed states.
Some devices, as in Herner et al., U.S. patent application Ser. No. 10/326,470, “An Improved Method for Making High Density Nonvolatile Memory,” filed Dec. 19, 2002 and hereinafter the '470 application, which is hereby incorporated by reference, employ a vertically oriented semiconductor junction diode interposed between conductors, the diode separated from at least one of the conductors by a dielectric rupture antifuse, or having a dielectric rupture antifuse interposed between diode portions.
Other ways of constituting a three dimensional array of programmable memory cells can advantageously be pursued, however.